1. Field of the Invention
The present invention relates to the field of microelectronics, and more particularly, to a method of manufacturing a semiconductor memory device having a storage node with a rugged surface.
2. Description of the Related Art
In general, the capacity of semiconductor memory devices, and more particularly DRAM (Dynamic Random Access Memory) devices, is increasing due to the decrease in unit cell area. Capacity of a memory cell capacitor must be maintained to prevent deterioration of operating characteristics of the memory device. Providing sufficient capacity to work in the decreased memory cell area is a problem. The structure of a memory cell capacitor has evolved to a three dimensional structure from a two dimensional structure to provide sufficient capacitor area. Stack capacitors, Double Stack capacitors, FIN structures, Spread Stack capacitors, Box structures, and Cylinder electrode structures (U.S. Pat. No. 5,381,365) are suggested for increasing the memory cell capacitor area. These capacitor structures, however, are complicated to manufacture. U.S. Pat. No. 5,278,091 discloses a method of manufacturing of a Cylinder capacitor using HSG (Hemi-Spherical Grain) technology. Furthermore, for increasing the effective area of the capacitor, an advanced HSG technology is disclosed in "Hemispherical Grained Si Formation on in-situ Phosphorus Doped Amorphous-Si Electrode for 256 Mb DRAM's Capacitor", IEEE Vol. 42, July 95, by Hirohito Watanabe. The conventional art for manufacturing a capacitor using an HSG silicon layer process will now be described briefly referring to FIG. 1 through FIG. 3.
FIG. 1 and FIG. 2 are vertical sectional views showing examples of capacitors made using a conventional HSG silicon layer manufacturing process.
Referring to FIG. 1, transistor (not shown) and insulating interlayer 12 are formed on a semiconductor substrate 10. A conductive layer 14 for a storage electrode is formed on insulating interlayer 12 and is connected to the source of the transistor at the lower end thereof. The conductive layer for a storage electrode can be formed in cylindrical shape for increasing the surface area. Methods of forming a cylindrical shaped storage electrode are well known. Over the resulting structure, blanket HSG 16 is formed in the usual manner. This blanket HSG is formed on all surface including insulating interlayer 12 and conductive layer 14.
Referring to FIG. 2, prevention short circuits among adjacent cell capacitors formed by HSG silicon layer 16 requires additional processing. An insulating layer covers the cylinder electrode and is etched using an anisotropic etching method thus forming spacers, like spacer 18, inside and outside of the cylinder. Thereafter, the HSG silicon layer formed between adjacent cells is etched using the spacer 18 as etch mask. After the spacer is removed, a method of formation of a cylindrical shaped electrode with HSG is completed.
However, as the semiconductor device becomes highly integrated and the distance between adjacent cells becomes shorter, it is hard to form a spacer outside of cylinder capacitor. For example, on a 256 M DRAM level having a cell pitch under 0.4 .mu.m, the distance between adjacent cylinders is under 0.2 .mu.m. In this case, it is hard to form the spacer after HSG silicon layer is formed as shown in the dotted circle of FIG. 2.
FIG. 3 is a schematic view of another example of structure formed using a conventional HSG silicon layer process.
Referring to FIG. 3, an insulating layer 22 and a conductive layer 24, which is formed a storage electrode, are formed on the semiconductor substrate 20. Then, a selective HSG silicon layer is formed on only the conductive layer 24. Because the selective HSG silicon layer is not formed on insulating layer, but is formed on the conductive layer with poly crystalline silicon under high vacuum and appropriate temperature condition. In this manner, the process step to prevent short circuits among adjacent cells can be eliminated. However, when the distance between adjacent cells decreases, the HSG forming selectivity is worse and short circuits can occur. This selectivity problem is severe when silicon nitride film is layered under the storage electrode.